Working on Adaptive Clock Generators for CPU and GPU applications, custom mixed signal circuits and logic design in advanced CMOS technologies using custom and semi custom physical design flows Develop and Simulate RTL code in Verilog Design and Simulate Power Management Circuit Architectures on System level, RTL level and on Transistor level using Matlab, SystemVerilog,

Architect, design, and implement high performance system software for AIE enabled devices that accelerates ML workloads. Work with technical leads and others to converge on the design of runtime software components. Collaborate with cross functional engineering teams to implement and debug software stack on AIE enabled device as required. PREFERRED EXPERIENCE Strong softw

Contribute to the definition of circuit architecture and to the design implementation of various state of the art, low power blocks, and area efficient circuits for DDR,LPDDR,GDDR PHYs Develop models for link level statistical performance simulation of the PHY (Link Training, PHY, DRAM, DB/RCD, DFE training, Transmit Equalization) and application of the same to the develo

Work with architects to understand the product specification and power management features to build an efficient customer focused solution Translate technical knowledge and integrate these features accurately into our design Interface with IP design team, SoC integration team, DFX, Design Verification and Physical design team to analyze and optimize the power management i

The primary responsibility is for server firmware test case development in conjunction with coordination with architects, BIOS developers, vendors, and quality assurance teams to develop robust, innovative server firmware testing for customer reference boards. A successful candidate will employ solid software testing methodologies, debug capabilities, test case reviews an

Defines, plans and drives projects and program plans based on management and senior technical guidance Possesses a thorough knowledge of the principles ofproject management and can apply them effectively on small to large size projects Has responsibility for projects or processes of significant technical importance and for results that cross engineering project areas Init

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next generation computing experiences the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD

Manage technical interaction with OEM/ODM Partners to enable deployment of AMD Instinct Accelerators in Partner systems. Support Partners in the bring up and validation of AMD Instinct GPUs in their system, guide partners on use of AMD tools, qualification test methods, and analysis of test results. Lead the debug of Partner/Customer issues (HW, firmware, driver), working

Creates and enables efficient geographically agnostic processes and tools to optimize quality and consistency of Cadence CAD designs. Proactively explores, pathfinds, and supports state of the art Cadence PCB design and EDA tools and processes to support our internal teams Capable of debugging and solving technical Cadence PCB design and working directly with Cadence for

Manage technical interaction with OEM/ODM Partners to enable deployment of AMD Instinct Accelerators in Partner systems. Support Partners in the bring up and validation of AMD Instinct GPUs in their system, guide partners on use of AMD tools, qualification test methods, and analysis of test results. Lead the debug of Partner/Customer issues (HW, firmware, driver), working

Lead the design and implementation of SEV SNP live migration for Linux. Identifying bottlenecks and optimizations & features to advantage EPYC CPUs. Drive features and functionality to our partner technical teams including the Linux kernel, virtualization, and security communities. Support the solutions offered by our partner companies. Review code, build unit tests, and

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next generation computing experiences the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD

Enable C++ based diagnostics to be run as patterns on Automated Test Equipment (ATE) Run and debug simulations based on these patterns for hardware developed in Verilog Debug waveforms in Verdi Run emulation on FPGA platforms for these patterns Collaborate closely with design and diagnostics teams to understand and adapt C++ diagnostic algorithms for effective ATE testing

Develop and maintain ML serving solutions on top of SHARK/IREE compiler and runtime Enable various ML model parallelism techniques on top of SHARK/IREE Analyze whol e system performance, identify bottlenecks, propose ideas to improve, prototype and productionize solutions Follow industry directions and adopt emerging technologies in model serving PREFERRED EXPERIENCE Fami

Work with AMD's architecture specialists to improve future products Apply a data minded approach to target optimization efforts Stay informed of software and hardware trends and innovations, especially pertaining to algorithms and architecture Design and develop new groundbreaking AMD technologies Participating in new ASIC and hardware bring up s Debugging /fix existing i