16 to 28 of 28
Sort by: Date | Relevance
Marvell Semiconductor, Inc.
- Marlborough, MA / Austin, TX / Santa Clara, CA / 3 more...
Marvell's Processor Business Group (PBG) is looking for an experienced, talented architect to join our architecture team. As an SoC architect, you'll be responsible for Engaging with customers, engineering, and marketing to lead chip architecture of innovative and complex processor based SoCs Architecting new blocks and capabilities Overseeing and coordinating IP evaluati
Posted 4 days ago
Verify functionality of high performance memory sub system or other subsystems at the unit and/or sub system levels. Develop and execute test plans to verify correctness and performance of the design. Own and debug failures in simulation to root cause problems Closely work with logic designers and architects for test plan development, execution, debug and coverage closure
Posted 5 days ago
Marvell Semiconductor, Inc.
- Burlington, VT / Rochester, MN / Morrisville, NC / 1 more...
Use Cadence Innovus place and route Tempus timing tool (show proficiency in timing closure) Understand Standard Cell library structure using 5,7,14 nm with ability to lead to 3nm. Demonstrate use of High speed clock distribution Have experience with above specified EDA tools to support custom design , simulation, layout. Develop scripts, programs, flows, and methodologies
Posted 5 days ago
Marvell Semiconductor, Inc.
- Burlington, VT / Rochester, MN / Santa Clara, CA / 2 more...
Provide technical leadership to a world wide team of engineers who are implementing customer specific designs from RTL hand off through tape out. Lead technical experts across place & route, timing, power, design for test, and packaging domains using design automation tools/flows and scripting languages while employingindustry best practices. Work with stakeholders throug
Posted 5 days ago
Strong user of Synopsys PrimeTime (or other equivalent timing tool) including these skills translating design timing requirements into SDC accurate evaluation of PrimeTime timing reports to identify solutions to timing issues extracting relevant timing data from timing runs interactively Strong knowledge on several key static timing analysis concepts which can include cro
Posted 8 days ago
As a member of the SoC RTL integration team, our job is to bring Marvell's next generation cloud, networking, security and mobile processors together. Responsibilities include Work with Architects, IP RTL development teams, Verification teams and Physical Design teams to integrate complex, high performance IP into a cohesive product Be responsible for integration level RT
Posted 11 days ago
Job Responsibilities Understanding the design requirements and customer specification Pick up and run the defined computer aided design (CAD) tools/flow for the assigned designs Design and Develop the SOC using Linux. TCL, Python/Perl (or other equivalent scripting languages) Analyze, debug, and implement DFT features using defined CAD tools/flow Collaborate with global C
Posted 1 month ago
As a Digital IC Design Engineer you will contribute by developing the next generation of cloud, networking, and security processors. Work with Architects and Verification Engineers to develop complex, high performance and timing critical designs. Be responsible for block level micro architecture design and RTL coding Provide area/power optimization and design trade offs B
Posted 1 month ago
Marvell Semiconductor, Inc.
- Marlborough, MA / Morrisville, NC
Develop and support Marvell's block level and partition level construction and signoff flows, incorporating industry standard EDA tools Perform synthesis, PnR, timing analysis, and backend checks on complex logic blocks Develop and implement timing and logic ECOs Interact with the RTL design team to drive design modifications to resolve congestion and timing issues Work w
Posted 1 month ago
Marvell Semiconductor, Inc.
- Marlborough, MA / Morrisville, NC
As a Digital IC Design Engineer you will contribute by developing the next generation of cloud, networking, and security processors. Work with Architects and Verification Engineers to develop complex, high performance and timing critical designs. Be responsible for block level micro architecture design and RTL coding Provide area/power optimization and design trade offs B
Posted 1 month ago
As a Digital IC Design Engineer you will contribute by developing the next generation of 5G Baseband technology processors. Work with Architects and Verification Engineers to develop complex, high performance and timing critical designs. Be responsible for block level micro architecture design and RTL coding Provide area/power optimization and design trade offs Block and
Posted 3 days ago
Marvell Semiconductor, Inc.
- Santa Clara, CA / Austin, TX / Morrisville, NC / 2 more...
As a Physical Design Engineer (Global Timing), you will be part of our Global Timing team and responsible for Running/supporting/maintaining the Global Timing Flow using industry standard EDA tools for designing the next generation Multi Ghz high performance processor SOC chips in leading edge CMOS process technology. Running the Sign off STA flow across all modes and cor
Posted 4 days ago
In this role, you will work on the verification environment for Marvell Fusion Baseband processor, including testbench architecture, developing reference models, bus functional monitors and drivers to verify the complex hardware powering this product line. Activities may include Writing a verification test plan using random techniques and coverage analysis and working wit
Posted 8 days ago
Email this Job to Yourself or a Friend
Indicates required fields